Samsung Announces Exynos 5430: First 20nm Samsung SoC

While we mentioned this in our Galaxy Alpha launch article, Samsung is finally announcing the launch of their new Exynos 5430 SoC.

While details are somewhat sparse, this new SoC is a big.LITTLE design with four Cortex A15s running at 1.8 GHz and four Cortex A7s running at 1.3 GHz for the CPU side, and a Mali T628MP6 for the GPU side. Although the power/performance characteristics of such a configuration are relatively well-understood by now, the real news is that this is the first SoC that we've seen running on Samsung's 20nm HKMG process.

While this is still a planar transistor process, a few critical changes have been made that make 20nm HKMG a significant leap forward from 28nm HKMG. First, instead of a gate-first approach for the high-k metal gate formation, the gate is now the last part of the transistor to be formed. This improves performance because the characteristics of the gate are no longer affected by significant high/low temperatures during manufacturing. In addition, lower-k dielectric in the interconnect layers reduce capacitance between the metal and therefore increase maximum clock speed/performance and reduce power consumption. Finally, improved silicon straining techniques should also improve drive current in the transistors, which can drive higher performance and lower power consumption.

There's no word on when to expect this SoC, but it will first ship in the Galaxy Alpha smartphone.

While we mentioned this in our Galaxy Alpha launch article, Samsung is finally announcing the launch of their new Exynos 5430 SoC.

While details are somewhat sparse, this new SoC is a big.LITTLE design with four Cortex A15s running at 1.8 GHz and four Cortex A7s running at 1.3 GHz for the CPU side, and a Mali T628MP6 for the GPU side. Although the power/performance characteristics of such a configuration are relatively well-understood by now, the real news is that this is the first SoC that we’ve seen running on Samsung’s 20nm HKMG process.

While this is still a planar transistor process, a few critical changes have been made that make 20nm HKMG a significant leap forward from 28nm HKMG. First, instead of a gate-first approach for the high-k metal gate formation, the gate is now the last part of the transistor to be formed. This improves performance because the characteristics of the gate are no longer affected by significant high/low temperatures during manufacturing. In addition, lower-k dielectric in the interconnect layers reduce capacitance between the metal and therefore increase maximum clock speed/performance and reduce power consumption. Finally, improved silicon straining techniques should also improve drive current in the transistors, which can drive higher performance and lower power consumption.

There’s no word on when to expect this SoC, but it will first ship in the Galaxy Alpha smartphone.